SEMICONDUCTOR ARRANGMENT WITH CAPACITOR

摘要

A semiconductor arrangement includes a logic region and a memory region. The memory region has an active region that includes a semiconductor device. The memory region also has a capacitor within one or more dielectric layers over the active region, where the capacitor is over the semiconductor device. The semiconductor arrangement also includes a protective ring within at least one of the logic region or the memory region and that separates the logic region from the memory region. The capacitor has a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, where the first electrode is substantially larger than other portions of the capacitor.

主权项

1. A semiconductor arrangement comprising:
an active region comprising a semiconductor device; and a capacitor having a first electrode, a second electrode, and an insulating layer between the first electrode and the second electrode, a first portion of the insulating layer a first distance from the active region, a second portion of the insulating layer, adjacent the capacitor, a second distance from the active region, the first distance greater than the second distance, the first portion over a metal contact formed in a dielectric layer over the active region, the metal contact providing an electrical connection through the dielectric layer to the semiconductor device, the second portion over the dielectric layer but not over the metal contact.