VOLTAGE REGULATOR TRAINING

摘要

Embodiments including systems, methods, and apparatuses associated with increasing the power efficiency of one or more components of a computing system. Specifically, the system may include a processor chip which may include an on-die voltage regulator (VR) configured to supply a voltage to a component of the processor chip. The processor chip may be coupled with a dynamic random access memory (DRAM). The system may further include an external VR coupled with the DRAM. A BIOS may be configured to regulate the voltage output of one or both of the on-die VR and/or the external VR. Other embodiments may be described or claimed.

主权项

1. An apparatus comprising:
an analog front end (AFE); and a voltage regulator coupled with the AFE, the voltage regulator configured to supply a voltage to the AFE; wherein the voltage regulator is configured to dynamically alter the voltage to reduce power consumption of the AFE based at least in part on a result of a training loop performed on system power up or system reset.