| 摘要 |
PROBLEM TO BE SOLVED: To provide a coverage enhancement and power aware clock system for a structural delay-fault test.SOLUTION: Methods and devices applied to a clock system of scan circuits to enhance the test coverage for structural delay-fault tests are provided. According to an aspect, a method applied to a clock system of a scan circuit of a scan test containing one or more clock gating cells includes, at any stage of the scan test, outputting a controllable waveform of a clock signal at each clock gating cell, and eliminating a partially enabled clock signal during a capture cycle at each clock gating cell. |
