| 发明名称 |
MEMORY SYSTEM |
| 摘要 |
Provided is a device for use in a memory module coupled to a host memory controller over a bus, comprising memory module control logic to generate a request signal to a host memory controller having a pulse width greater than or equal to a minimum pulse width, wherein the minimum pulse width comprises a number of clock cycles needed to guarantee that the host memory controller detects the request signal, and wherein the pulse width of the request signal indicates at least one function in addition to the request signal to the host memory controller. |
| 申请公布号 |
US2015149735(A1) |
申请公布日期 |
2015.05.28 |
| 申请号 |
US201313977653 |
申请日期 |
2013.03.15 |
| 申请人 |
Intel Corporation |
发明人 |
Nale Bill;Nachimuthu Murugasamy K.;Zhu Jun;Quach Tuan M. |
| 分类号 |
G06F13/16;G06F12/08 |
主分类号 |
G06F13/16 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A device for use in a memory module coupled to a host memory controller over a bus, comprising:
memory module control logic to generate a request signal to the host memory controller having a pulse width greater than or equal to a minimum pulse width, wherein the minimum pulse width comprises a number of clock cycles needed to guarantee that the host memory controller detects the request signal, and wherein the pulse width of the request signal indicates at least one function in addition to the request signal to the host memory controller. |
| 地址 |
Santa Clara CA US |
