发明名称 |
ZERO-CROSSING DETECTION CIRCUIT AND METHOD FOR SYNCHRONOUS STEP-DOWN CONVERTER |
摘要 |
In one embodiment, a zero-crossing detection circuit for a synchronous step-down converter, can include: (i) a state determination circuit configured to compare a drain voltage of a synchronous transistor of the synchronous step-down converter against a reference voltage, and to generate a state digital signal indicative of whether a body diode of the synchronous transistor is turned on; (ii) a logic circuit configured to convert the state digital signal into a counting instruction signal; (iii) a plus-minus counter configured to generate a numerical signal in response to the counting instruction signal; (iv) a DAC configured to generate a correction analog signal based on the numerical signal; and (v) a zero-crossing comparator configured to receive the correction analog signal and the drain voltage of the synchronous transistor, and to provide a zero-crossing comparison signal to a driving circuit of the synchronous step-down converter. |
申请公布号 |
US2015145489(A1) |
申请公布日期 |
2015.05.28 |
申请号 |
US201414541428 |
申请日期 |
2014.11.14 |
申请人 |
Silergy Semiconductor Technology (Hangzhou) LTD |
发明人 |
Hou Jinzhao;Chen Chen |
分类号 |
H03K5/1536;H02M3/158;H02M1/08 |
主分类号 |
H03K5/1536 |
代理机构 |
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代理人 |
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主权项 |
1. A zero-crossing detection circuit for a synchronous step-down converter, the zero-crossing detection circuit comprising:
a) a state determination circuit configured to compare a drain voltage of a synchronous transistor of said synchronous step-down converter against a reference voltage, and to generate a state digital signal indicative of whether a body diode of said synchronous transistor is turned on; b) a logic circuit configured to convert said state digital signal into a counting instruction signal; c) a plus-minus counter configured to generate a numerical signal in response to said counting instruction signal; d) a digital-analog converter configured to generate a correction analog signal based on said numerical signal; and e) a zero-crossing comparator configured to receive said correction analog signal and said drain voltage of said synchronous transistor, and to provide a zero-crossing comparison signal to a driving circuit of said synchronous step-down converter. |
地址 |
Hangzhou CN |