| 主权项 |
1. A readout device capable of impedance detection, said readout device comprising:
a plurality of detecting circuits arranged in rows and columns to form a detecting array, each of said detecting circuits including:
an output terminal, wherein said output terminals of said detecting circuits arranged in the same column are coupled to each other;a first transistor having a first terminal to be coupled to a voltage source, a second terminal, and a control terminal coupled to said second terminal thereof;a second transistor having a first terminal coupled to said second terminal of said first transistor, a second terminal to be coupled to a target site, and a control terminal disposed to receive an input voltage, wherein said second transistor is responsive to the input voltage to generate a detection signal at said second terminal thereof, the detection signal having a magnitude proportional to impedance at the target site; anda switch disposed to receive a row control signal that is provided to said switches of all of said detecting circuits arranged in the same row, and configured to selectively transmit the detection signal at said second terminal of said second transistor to said output terminal in response to the row control signal received thereby; and an output module coupled to said output terminal of each of said detecting circuits, disposed to receive a select signal, and configured to output an output voltage signal having a magnitude positively correlated with magnitude of one of the detection signals received thereby and selected according to the select signal. |
