Circuit and Method for Improving ESD Tolerance and Switching Speed

摘要

Embodiments of systems, methods, and apparatus for improving ESD tolerance and switching time for semiconductor devices including metal-oxide-semiconductor (MOS) field effect transistors (FETs), and particularly to MOSFETs fabricated on semiconductor-on-insulator and silicon-on-sapphire substrates. Embodiments provide an improved FET structure having an accumulated charge sink (ACS) circuit, fast switching times, and improved ESD tolerance.

主权项

1. An electronic circuit including:
(a) a field effect transistor (FET) having a gate, a drain, a source, and a body; (b) a gate resistor series connected to the gate of the FET; (c) an accumulated charge sink (ACS) circuit connected to the body of the FET; and (d) an ACS resistance series connected to the ACS circuit, wherein the series-connected ACS resistance and the ACS circuit are connected to the gate resistor of the FET.