发明名称 パワー半導体モジュール
摘要 In a semiconductor module according to certain aspects the invention, a U-terminal and an M-terminal overlap each other in a manner to reduce inductance and to further to reduce the size of snubber capacitor. In certain aspects of the invention, a P-terminal, M-terminal, N-terminal, and U-terminal are arranged such that the U-terminal, through which currents flow in and out, is arranged farthest away from control electrodes to reduce the noises superposed to control electrodes, and the P-terminal, M-terminal, N-terminal, and U-terminal are aligned to facilitate attaching external connection bars thereto. A power semiconductor module according to aspects of the invention can facilitate reducing the wiring inductance inside and outside the module, reducing the electromagnetic noises introduced into the control terminals, and attaching the external wirings to the terminals thereof simply and easily.
申请公布号 JP5724314(B2) 申请公布日期 2015.05.27
申请号 JP20100255765 申请日期 2010.11.16
申请人 富士電機株式会社 发明人 沖田 宗一
分类号 H02M7/48;H02M7/483 主分类号 H02M7/48
代理机构 代理人
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