| 摘要 |
<p>The objective of the present invention is to provide a technique by which a high-resistance state of MOS resistors can be maintained in a semiconductor integrated circuit that constitutes a continuous C-V converter. This semiconductor integrated circuit is provided with: a pair of capacitive sensors (CSN, CSP); a differential amplifier (A1); a first MOS resistor (R1) that comprises a pair of first MOS transistors (MN1, MP1) that are connected in series and the conductivity types of which are different; a second MOS resistor (R2) that comprises a pair of second MOS transistors (MN2, MP2) that are connected in series and the conductivity types of which are different; a first load capacitance (CLP); a second load capacitance (CLN); and a bias circuit (B). The bias circuit (B) controls the resistances of the first and second MOS resistors (R1, R2) on the basis of the voltage at the differential output terminals of the differential amplifier (A1).</p> |
