发明名称 Memory device
摘要 In a memory device, memory capacity per unit area is increased while a period in which data is held is ensured. The memory device includes a driver circuit provided over a substrate, and a plurality of memory cell arrays which are provided over the driver circuit and driven by the driver circuit. Each of the plurality of memory cell arrays includes a plurality of memory cells. Each of the plurality of memory cells includes a first transistor including a first gate electrode overlapping with an oxide semiconductor layer, and a capacitor including a source electrode or a drain electrode, a first gate insulating layer, and a conductive layer. The plurality of memory cell arrays is stacked to overlap. Thus, in the memory device, memory capacity per unit area is increased while a period in which data is held is ensured.
申请公布号 US9042161(B2) 申请公布日期 2015.05.26
申请号 US201113230184 申请日期 2011.09.12
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Koyama Jun;Yamazaki Shunpei
分类号 G11C11/24;G11C5/02;G11C11/404;G11C11/4097;G11C8/08 主分类号 G11C11/24
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A memory device comprising: a driver circuit; and a plurality of memory cell arrays which is provided over the driver circuit and is configured to be driven by the driver circuit, wherein each of the plurality of memory cell arrays comprises a plurality of memory cells arranged in matrix, wherein each of the plurality of memory cells comprises a first transistor comprising a channel formation region in an oxide semiconductor layer, wherein the driver circuit comprises a second transistor comprising a channel formation region comprising a semiconductor material other than an oxide semiconductor, wherein the second transistor is provided below the first transistor with an insulating layer provided therebetween, and wherein the plurality of memory cell arrays is stacked to overlap.
地址 Kanagawa-ken JP