发明名称 Noncontact determination of interface trap density for semiconductor-dielectric interface structures
摘要 Embodiments of the subject method and apparatus relate to a sequence of noncontact Corona-Kelvin Metrology, C-KM, that allows the determination and monitoring of interface properties in dielectric/wide band gap semiconductor structures. The technique involves the incremental application of precise and measured quantities of corona charge, QC, onto the dielectric surface followed by determination of the contact potential difference, VCPD, as the material structure response. The V-Q characteristics obtained are used to extract the surface barrier, VSB, response related to the applied corona charge. The metrology method presented determines an intersection of the VCPD-QC characteristic obtained in the dark with the VOX-QC characteristic representing the dielectric response. The specific VSB-QC dependence surrounding the reference VFB value is obtained from this method and allows the noncontact determination of the dielectric interface trap density and its spectrum. Application of embodiments of the subject metrology method to thermal oxide on n-type 4H—SiC demonstrates the modification of the Dit distribution by Fowler-Nordheim stress. In addition, an ability to quantify and separate trapped charge components is provided.
申请公布号 US9041417(B2) 申请公布日期 2015.05.26
申请号 US201414158269 申请日期 2014.01.17
申请人 University of South Florida 发明人 Oborina Elena I.;Hoff Andrew
分类号 G01R31/26;G01R31/311;G01R27/26;G01R31/28;H01L21/66;G01R31/265 主分类号 G01R31/26
代理机构 Saliwanchik, Lloyd & Eisenschenk 代理人 Saliwanchik, Lloyd & Eisenschenk
主权项 1. A non-transitory computer-readable medium containing a set of instructions that when executed cause a computer to perform a method of determining an interface trap density at an interface between a semiconductor and a dielectric or oxide layer disposed on a surface of the semiconductor, the method comprising: determining a dielectric capacitance, COX, value of a dielectric or oxide layer disposed on a semiconductor while the semiconductor is in accumulation from measured contact potential difference voltage, VCPD, values and corresponding electric charge, QC, values, and values of at least two increments of additional electric charge, wherein an initial electric charge placed on at least a portion of a surface of the dielectric or oxide layer creates an accumulation state in the semiconductor and results in an electric charge, QC, on the at least a portion of the surface of the dielectric or oxide layer, wherein the at least two increments of additional electric charge having an opposite sign as the initial electric charge placed on the at least a portion of the surface of the dielectric or oxide layer places the semiconductor in depletion and changes the electric charge, QC, with the placement of each of the at least two increments of additional electric charge, wherein the measured contact potential difference voltage, VCPD, values are measured after placement of each of the at least two increments of additional electric charge on the at least a portion of the surface of the dielectric or oxide layer and each measured value of the contact potential difference, VCPD, corresponds to a value of electric charge, QC, on the at least a portion of the surface of the dielectric or oxide layer; determining a flat band voltage, VFB, of the contact potential difference voltage, VCPD, from a doping level in the semiconductor and the dielectric capacitance value, COX; determining one or more surface barrier voltage values, VSB, wherein the surface barrier voltage value, VSB, is a difference between the contact potential difference voltage, VCPC, on a VCPD-QC curve at the corresponding electric charge, QC, and a voltage value, VOX, on a line at the corresponding electric charge, QC, wherein the line has a slope that is an inverse of the dielectric capacitance value, COX, and the line intersects the VCPD-QC curve based on the measured contact potential difference voltage values, VCPD and corresponding electric charge values, QC, at the flatband voltage, VFB; and determining one or more interface trap densities, Dit, for a corresponding one or more electric charge values, QC, from the corresponding one or more electric charge values, QC, the corresponding surface barrier voltage values, VSB, the doping level in the semiconductor, and an extrinsic Debye length, LD, for the semiconductor.
地址 Tampa FL US