发明名称 |
Efficient processing of cache segment waiters |
摘要 |
For a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, a process, separate from a process responsible for the data assembly into the complete data tracks, is initiated for waking a predetermined number of the waiting I/O operations. |
申请公布号 |
US9043551(B1) |
申请公布日期 |
2015.05.26 |
申请号 |
US201414230252 |
申请日期 |
2014.03.31 |
申请人 |
International Business Machines Corporation |
发明人 |
Ash Kevin J.;Benhase Michael T.;Gupta Lokesh M.;Whitworth David B. |
分类号 |
G06F13/28;G06F12/08;G06F13/00 |
主分类号 |
G06F13/28 |
代理机构 |
Griffiths & Seaton PLLC |
代理人 |
Griffiths & Seaton PLLC |
主权项 |
1. A system for cache management in a computing storage environment, the method comprising:
a processor device, operable in the computing storage environment, wherein the processor device:
for a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, initiates a process, separate from a process responsible for the data assembly into the complete data tracks, for waking a predetermined number of the waiting I/O operations. |
地址 |
Armonk NY US |