发明名称 Methods for fabricating integrated circuits having gate to active and gate to gate interconnects
摘要 Methods are provided for fabricating an integrated circuit that includes gate to active contacts. One method includes forming a dummy gate structure including a dummy gate electrode having sidewalls and overlying a semiconductor substrate and first and second sidewall spacers on the sidewalls of the dummy gate electrode. The method includes removing the dummy gate electrode to form a trench bounded by the first and second sidewall spacers. The method removes an upper portion of the first sidewall spacer and deposits a layer of metal in the trench and over a remaining portion of the first sidewall spacer to form a gate electrode and an interconnect.
申请公布号 US9040403(B2) 申请公布日期 2015.05.26
申请号 US201414244611 申请日期 2014.04.03
申请人 GLOBALFOUNDRIES, INC. 发明人 Scheiper Thilo;Flachowsky Stefan;Wei Andy
分类号 H01L21/3205;H01L21/4763;H01L29/66;H01L21/762;H01L21/768 主分类号 H01L21/3205
代理机构 Ingrassia Fisher & Lorenz, P.C. 代理人 Ingrassia Fisher & Lorenz, P.C.
主权项 1. A method of fabricating an integrated circuit, the method comprising: forming a dummy gate structure comprising a dummy gate electrode having sidewalls and overlying a semiconductor substrate and first and second sidewall spacers on the sidewalls of the dummy gate electrode; forming a contact on the semiconductor substrate adjacent the first sidewall spacer; removing the dummy gate electrode to form a trench bounded by the first and second sidewall spacers; removing an upper portion of the first sidewall spacer; and simultaneously forming a gate electrode and a gate-to-contact interconnect by depositing a layer of metal in the trench, over a remaining portion of the first sidewall spacer, and over the contact.
地址 Grand Cayman KY