Silicon carbide MOS semiconductor device

摘要

A silicon carbide MOS semiconductor device is disclosed which suppresses degradation of efficiency percentage yield with respect to a breakdown voltage even when a surface region with a high impurity concentration is formed by ion implantation with such a high dose as required for attaining a good ohmic contact. The device has a silicon carbide semiconductor substrate, a voltage blocking layer of a first conductivity type formed on the substrate, a body region of a second conductivity type formed on the voltage blocking layer, a body contact region of the second conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the body contact region having such a high impurity concentration as to impart an ohmic contact, a source contact region of the first conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the source contact region having such a high impurity concentration as to impart an ohmic contact, and a source extension region with an impurity concentration lower than that in the source contact region under the source contact region at a region deeper than a tail part of a bottom region of the source contact region by selective ion implantation, the source extension region having an impurity concentration less than 3×1019 cm−3.

主权项

1. A silicon carbide MOS semiconductor device comprising:
a silicon carbide semiconductor substrate; a voltage blocking layer of a first conductivity type on a principal plane of the substrate; a body region of a second conductivity type on the voltage blocking layer: a body contact region in a surface region of the body region, the body contact region having impurity ions implanted therein and being of the second conductivity; a source contact region in a surface region of the body region, the source contact region having impurity ions implanted therein and being of the first conductivity type, the source contact region having an impurity concentration of 3×1019 cm−or higher and a thickness of from 0.3 μm to 0.4 μm, and having a tail part in a bottom region of the source contact region with a depth deeper than the depth of ion implantation in the source contact region; an electrode contacting the body contact region and the source contact region, wherein the surface impurity concentration of the body contact region and that of the source contact region are sufficient to cause an ohmic contact with the electrode; a source extension region under the source contact region at a region deeper than the tail part of the doping in the bottom region of the source contact region, the source extension region having impurity ions implanted therein with an impurity concentration of less than 3×1019 cm−, which concentration is lower than that in the source contact region and a depth of the source extension region being within 1 μm from the surface of the source contact region, and being formed under the tail part by selective ion implantation; and a trench formed from a top surface of the source contact region and passing through the source contact region, the source extension region, and the body region, and a gate electrode embedded in the trench on an internal surface thereof via an insulation film, an upper end of the embedded gate electrode being above the lower end of the source contact region, wherein the source contact region and the voltage blocking layer are separated from each other by the body region.