Distributed ECC engine for storage media

摘要

Embodiments of the present invention relate to an apparatus, method, and/or sequence for a distributed ECC that may be used in a storage system. In another embodiment of the invention, an apparatus for handling distributed error correction code (ECC) operations, includes: a plurality of ECC engines configured to perform ECC operations in parallel on multiple data parts; the plurality of ECC engines distributed in parallel to receive some of the multiple data parts that are read from storage media devices and to receive some of the other multiple data parts that are to be written to the storage media devices; and the plurality of ECC engines configured to use respective ECC bytes corresponding to respective ones of the multiple data parts.

主权项

1. An apparatus for handling distributed error correction code (ECC) operations, the apparatus comprising:
a plurality of ECC engines configured to perform ECC operations in parallel on multiple data parts that are partitioned from a contiguous data; the plurality of ECC engines distributed in parallel to receive some of the multiple data parts that are read from storage media devices and to receive some of the other multiple data parts that are to be written to the storage media devices; the plurality of ECC engines configured to use respective computed ECC parts corresponding to respective ones of the multiple data parts; wherein the plurality of ECC engines comprises a first ECC engine and a second ECC engine; wherein the storage media devices comprises: a first group comprising a first plurality of storage media devices and a second group comprising a second plurality of storage media devices; a first storage interface controller coupled to the first ECC engine and to the first group; wherein the first storage interface is coupled between the first ECC engine and the first group; wherein the first storage interface comprises first logic to provide access to and directly control each of the first plurality of storage devices in the first group and to provide a first path between the first plurality of storage devices and the first ECC engine for the first data part and first computed ECC part; and a second storage interface controller coupled to the second ECC engine and to the second group; wherein the second storage interface is coupled between the second ECC engine and the second group; wherein the second storage interface comprises second logic to provide access to and directly control each of the second plurality of storage devices in the second group and to provide a second path between the second plurality of storage devices and the second ECC engine for the second data part and second computed ECC part; a processor configured to partition the contiguous data into the multiple data parts; wherein the multiple data parts comprises a first data part and a second data part; wherein, in parallel, the first ECC engine performs an ECC operation on the first data part including computing a first computed ECC part and the second ECC engine performs another ECC operation on the second data part including computing a second computed ECC part; and a storage direct memory access (DMA) controller coupled to the processor and to the first and second storage interface controllers; wherein the storage DMA controller is configured to write or read the first data part and the first computed ECC part in a first storage media device in the first group; wherein the storage DMA controller is configured to write or read the second data part and the second computed ECC part in another storage media device in the second group.