III-V FET device with overlapped extension regions using gate last

摘要

A structure and method for fabricating a III-V compound semiconductor-containing heterostructure field-effect transistor (FET) with self-aligned and overlapped extensions using a gate last process is disclosed. The a III-V compound semiconductor-containing heterostructure field-effect transistor (FET) structure may be formed by forming a III-V compound semiconductor-containing heterostructure having at least one layer; forming a doped contact layer on the III-V compound semiconductor-containing heterostructure; and forming a gate structure having a bottom surface substantially below an upper surface of the III-V compound semiconductor-containing heterostructure and an upper surface above the doped contact layer. An undoped region may be formed below the bottom surface of the T-shaped gate structure on a layer of the III-V compound semiconductor-containing heterostructure.

主权项

1. A method of forming a semiconductor device, comprising the steps of:
forming a III-V compound semiconductor-containing heterostructure above a substrate, wherein the III-V compound semiconductor-containing heterostructure comprises a buffer layer above the substrate, a channel layer above and in contact with the buffer layer, and a barrier layer above and in contact with the channel layer; and forming a gate structure, the gate structure having a width that extends between two spacers and a lowermost surface of the gate structure that is in contact with, and extends no further than a lowermost surface of the barrier layer, wherein a lowermost surface of the spacers is in contact with, and extends no further than, an uppermost surface of the barrier layer.