Three-dimensional integrated circuit with inter-layer vias and intra-layer coupled transistors

摘要

A circuit comprises a first layer and a second layer separate from the first layer. The first layer comprises a power line, a first transistor coupled to the power line, a second transistor coupled to the power line, and a first line coupling the first transistor and the second transistor. The second layer comprises a ground line, a third transistor coupled to the ground line, a fourth transistor coupled to the ground line, and a second line coupling the third transistor and the fourth transistor. The circuit also comprises an inter-layer interconnect that couples the first transistor and the third transistor. The inter-layer interconnect also couples the second transistor and the fourth transistor.

主权项

1. A circuit comprising:
a first layer comprising:
a power line;a first transistor having a gate, a source and a drain, the source of the first transistor being coupled to the power line;a second transistor having a gate, a source and a drain, the source of the second transistor being coupled to the power line; anda first line coupling the drain of the first transistor and the gate of the second transistor; a second layer comprising:
a ground line;a third transistor having a gate, a source and a drain, the drain of the third transistor being coupled to the ground line;a fourth transistor having a gate, a source and a drain, the drain of the fourth transistor being coupled to the ground line;a second line coupling the source of the third transistor and the gate of the fourth transistor; and an inter-layer interconnect coupling the drain of the first transistor to the source of the third transistor, and the drain of the second transistor to the source of the fourth transistor.