发明名称 Apparatus and method of compensating for I/Q imbalance in direct up-conversion system
摘要 An apparatus and a method of compensating for an I/Q imbalance in a direct up-conversion system prevents the performance of the system from being deteriorated by efficiently compensating for an I/Q timing skew, an I/Q phase imbalance, and an I/Q gain imbalance by using a characteristic of an OFDM scheme in an Orthogonal Frequency Domain Multiple (Access) (OFDM(A)) system using a direct up-conversion scheme. According to the apparatus and the method of compensating for an I/Q imbalance in the direct up-conversion system of the present invention, an OFDM(A) system using a direct up-conversion scheme may efficiently compensate for I/Q timing skew, I/Q phase imbalance, and I/Q gain imbalance by using a characteristic of an OFDMA scheme, so that a performance of the system is prevented from being deteriorated.
申请公布号 US9042483(B2) 申请公布日期 2015.05.26
申请号 US201214355941 申请日期 2012.04.30
申请人 INNOWIRELESS CO., LTD. 发明人 Joung Jinsoup;Ji Seunghwan;Lim Yonghoon;Jang Byungkwan
分类号 H04K1/02;H04B1/04;H04L27/36;H04L27/26 主分类号 H04K1/02
代理机构 Cantor Colburn LLP 代理人 Cantor Colburn LLP
主权项 1. An In-phase/Quadrature-phase (I/Q) imbalance compensation apparatus in a direct up-conversion system, the I/Q imbalance compensation apparatus comprising: a pre-distortion factor calculator for fetching pre-measured I/Q imbalance factors and calculating pre-distortion factor A, B, C and D; and a pre-distortion executer for executing a pre-distortion for each subcarrier through the distortion factors A, B, C and D corresponding to each subcarrier, wherein the pre-distortion factors A, B, C and D are calculated by the following equations,⁢Phasetiming⁢⁢_⁢⁢skew=2*π*(subcarrier⁢⁢index-(N2-1))*Δ⁢⁢f*τ⁢N2≤subcarrier⁢⁢index<N⁢⁢point⁢⁢FFTA=0.5*[(1+g)*cos⁡(ϕ)+(1-g)+cos⁡(ϕ)*cos⁡(Phasetiming⁢⁢_⁢⁢skew)-(1+g)*sin⁡(ϕ)*sin⁡(Phasetiming⁢⁢_⁢⁢skew)]B=0.5*[(g-1)*sin⁡(ϕ)+(1-g)+cos⁡(ϕ)*sin⁡(Phasetiming⁢⁢_⁢⁢skew)+(1+g)*sin⁡(ϕ)*cos⁡(Phasetiming⁢⁢_⁢⁢skew)]C=0.5*[(1+g)*cos⁡(ϕ)-(1-g)+cos⁡(ϕ)*cos⁡(Phasetiming⁢⁢_⁢⁢skew)-(1+g)*sin⁡(ϕ)*sin⁡(Phasetiming⁢⁢_⁢⁢skew)]D=0.5*[(g-1)*sin⁡(ϕ)+(1-g)+cos⁡(ϕ)*sin⁡(Phasetiming⁢⁢_⁢⁢skew)-(1+g)*sin⁡(ϕ)*cos⁡(Phasetiming⁢⁢_⁢⁢skew)] in which τ indicates I/O timing skew, g indicates an I/O gain imbalance, φ indicates an I/O phase imbalance, Δf indicates sampling rate/FFT size, and N indicates a positive integer equal to an FFT size.
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