VECTOR PROCESSING ENGINES (VPEs) EMPLOYING TAPPED-DELAY LINE(S) FOR PROVIDING PRECISION CORRELATION / COVARIANCE VECTOR PROCESSING OPERATIONS WITH REDUCED SAMPLE RE-FETCHING AND POWER CONSUMPTION, AND RELATED VECTOR PROCESSOR SYSTEMS AND METHODS

摘要

Vector processing engines (VPEs) employing a tapped-delay line(s) for providing precision correlation/covariance vector processing operations with reduced sample re-fetching and/or power consumption are disclosed. The VPEs disclosed herein are configured to provide correlation/covariance vector processing operations, such as code division multiple access (CDMA) correlation/covariance vector processing operations as a non-limiting example. A tapped-delay line(s) is included in the data flow paths between memory and execution units in the VPE. The tapped-delay line (s) is configured to receive and provide an input vector data sample set to execution units for performing correlation/covariance vector processing operations. The tapped-delay line(s) is also configured to shift the input vector data sample set for each filter delay tap and provide the shifted input vector data sample set to the execution units, so the shifted input vector data sample set need not be re-fetched from the vector data file during the filter vector processing operations.

主权项

1. A vector processing engine (VPE) configured to provide a correlation vector processing operation, comprising:
at least one vector data file configured to:
provide an input vector data sample set in at least one input data flow path for a correlation vector processing operation; andreceive a resultant correlated output vector data sample set in at least one output data flow path; andstore the resultant correlated output vector data sample set; at least one tapped-delay line provided between the at least one vector data file and at least one execution unit in the at least one input data flow path, the at least one tapped-delay line configured to shift the input vector data sample set by an input vector data sample width in a plurality of pipeline registers for each processing stage among a plurality of processing stages equal to a number of correlation samples for the correlation vector processing operation, to provide a shifted input vector data sample set for each processing stage among the plurality of processing stages; and the at least one execution unit provided in the at least one input data flow path, comprising:
at least one multiplier configured to correlate the shifted input vector data sample set with a received next reference vector data sample of a reference vector data sample set for each processing stage among the plurality of processing stages, to generate a correlation output vector data sample set for each of the number of the correlation samples; andat least one accumulator configured to accumulate the correlation output vector data sample set in the at least one accumulator for each processing stage among the plurality of processing stages; the at least one execution unit configured to provide the resultant correlated output vector data sample set in the at least one output data flow path.