FIELD EFFECT TRANSISTOR, TERMINATION STRUCTURE AND ASSOCIATED METHOD FOR MANUFATURING

摘要

The present disclosure discloses a field effect transistor (“FET”), a termination structure and associated method for manufacturing. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench and a guard ring region located underneath the bottom of the termination trench in the semiconductor layer. Each termination trench is lined with a termination insulation layer, and is filled with a first conductive spacer and a second conductive spacer respectively against an inner sidewall and an outer sidewall of the termination trench and spaced apart from each other with a space, and a dielectric layer filling the space between the first and the second spacers.

主权项

1. A field effect transistor having an active area and a termination area outside of the active area, comprising:
a semiconductor layer of a first conductivity type; a plurality of active transistor cells formed in the semiconductor layer in said active area, wherein each of the transistor cells comprises a drain region of the first conductivity type, a source region of the first conductivity type, an active body region of a second conductivity type and a gate region, and wherein the source region is located in the active body region and laterally adjacent to both sides of the gate region; a plurality of floating body regions of the second conductivity type disposed in the semiconductor layer in said termination area; and a plurality of termination cells disposed interleaving with the plurality of floating body regions in the termination area, and arranged substantially in parallel from an inner side toward an outer side of the termination area; wherein
each of the termination cells comprises a termination trench opened from a top surface of said semiconductor layer and having sidewalls and a bottom, wherein the termination trench includes a termination insulation layer lining the termination trench sidewalls and bottom, a first conductive spacer and a second conductive spacer located respectively against an inner sidewall and an outer sidewall among the termination trench sidewalls and spaced apart from each other, and a dielectric layer filling the space between the first conductive spacer and the second conductive spacer; and whereineach of the termination cells further comprises a guard ring region of the second conductivity type located underneath the bottom of the termination trench in the semiconductor layer.