| 摘要 |
<p>Disclosed are a method and system for adjusting a linear sequence of a double data rate synchronous dynamic random access memory (DDR). The method comprises: acquiring a linear sequence of a DDR connected to a system on chip (SoC), the linear sequence of the DDR being a signal sequence corresponding to a pin of the DDR connected to a printed circuit board (PCB); and according to the linear sequence of the DDR, adjusting a signal sequence corresponding to a pin of the SoC, so that the pin of the SoC is directly connected with the pin of the DDR via the PCB, that is, both the encapsulation wiring of the SoC and the wiring of the PCB can be guaranteed to be smooth and have no intersection when the SoC is in connection with the DDR, so that the board level time sequence and the signal quality can be guaranteed to be optimal.</p> |
