发明名称 MEMORY STRUCTURE AND OPERATION METHOD THEREFOR
摘要 Provided is an operation method applicable to a resistive memory cell including a transistor and a resistive memory element. The operation method includes: in a programming operation, generating a programming current flowing through the transistor and the resistive memory element so that a resistance state of the resistive memory element changes from a first resistance state into a second resistance state; and in an erase operation, generating an erase current from a well region of the transistor to the resistive memory element but keeping the erase current from flowing through the transistor, so that the resistance state of the resistive memory element changes from the second resistance state into the first resistance state.
申请公布号 US2015138871(A1) 申请公布日期 2015.05.21
申请号 US201314085839 申请日期 2013.11.21
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 Lee Ming-Hsiu;Lee Feng-Min;Lin Yu-Yu
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项 1. An operation method for a resistive memory cell including a transistor and a resistive memory element, the operation method comprising: in a programming operation, flowing a programming current through the transistor and the resistive memory element to change the resistive memory element from a first resistance state into a second resistance state; and in an erase operation, flowing an erase current from a well region of the transistor to the resistive memory element to change the resistive memory element from the second resistance state into the first resistance state, wherein the erase current does not flow through the transistor.
地址 Hsinchu TW