发明名称 REDUCED COMPLEXITY NON-BINARY LDPC DECODING ALGORITHM
摘要 Decoding logic is provided that is operational upon a data buffer to represent a plurality of variable nodes and a plurality of check nodes. For a respective one of the variable nodes, a vector component is selected from a confidence vector associated with the variable node. Using a respective one of the check nodes, a check node return value is calculated based on one or more other vector components from one or more other vectors and one or more vector indices corresponding to the one or more other vector components. The confidence vector is then updated based on the check node return value and an index for the check node return value, and a current state of a memory cell associated with the respective one of the variable nodes is determined based on a location of a primary one of multiple vector components within the updated confidence vector.
申请公布号 US2015143194(A1) 申请公布日期 2015.05.21
申请号 US201514607039 申请日期 2015.01.27
申请人 HGST Netherlands B.V. 发明人 NEMATI ANARAKI Majid;Hu Xinde;Barndt Richard D.
分类号 H03M13/11 主分类号 H03M13/11
代理机构 代理人
主权项 1. A system, comprising: a data buffer; a decoder comprising decoding logic operational upon the data buffer to represent a plurality of variable nodes and a plurality of check nodes, the decoder configured to: select, for a respective variable node, a vector component from a confidence vector associated with the variable node; associate the selected vector component with a check node; calculate, using the associated check node, a check node return value based on one or more other vector components corresponding to one or more other vectors; update the confidence vector based on the check node return value; and determine a current state of a memory cell associated with the respective variable node based on an index of a primary one of multiple vector components within the updated confidence vector.
地址 Amsterdam NL