| 发明名称 |
Low Latency Memory Access Control for Non-Volatile Memories |
| 摘要 |
A memory is provided that comprises a bank of non-volatile memory cells configured into a plurality of banklets. Each banklet in the plurality of banklets can be enabled separately and independently of the other banklets in the bank of non-volatile memory cells. The memory further comprises peripheral banklet circuitry, coupled to the bank of a non-volatile memory array, that is configured to enable selected subsets of bit lines within a selected banklet within the plurality of banklets. Moreover, the memory comprises banklet select circuitry, coupled to the peripheral banklet circuitry, that is configured to select data associated with a selected banklet for reading out from the banklet or writing to the banklet. |
| 申请公布号 |
US2015143020(A1) |
申请公布日期 |
2015.05.21 |
| 申请号 |
US201314082624 |
申请日期 |
2013.11.18 |
| 申请人 |
International Business Machines Corporation |
发明人 |
Ferreira Alexandre P.;Kuang Jente B.;Mukundan Janani;Rajamani Karthick |
| 分类号 |
G11C8/12;G11C11/16 |
主分类号 |
G11C8/12 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory, comprising:
a bank of non-volatile memory cells configured into a plurality of banklets, wherein each banklet in the plurality of banklets is separately able to be enabled independently of the other banklets in the bank of non-volatile memory cells; peripheral banklet circuitry, coupled to the bank of non-volatile memory cells, that is configured to enable selected subsets of bit lines within a selected banklet within the plurality of banklets; and banklet select circuitry, coupled to the peripheral banklet circuitry, that is configured to select data associated with a selected banklet for reading out from the banklet or writing to the banklet. |
| 地址 |
Armonk NY US |
