| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To detect an inter-drain-source voltage V<SB POS="POST">DS</SB>of an FET (Qo) by canceling a voltage drop component (an offset component) induced by a wiring pattern resistance Rp when a current flowing through the FET mounted on a printed wiring board is detected on the basis of a voltage drop V<SB POS="POST">DG</SB>by on-resistance Ron at the time of on of the FET and the wiring pattern resistance Rp. <P>SOLUTION: In a current detection circuit 1 of the present invention, a resistor series circuit of a first resistor Rd and a second resistor Ro is connected between a drain terminal D of an FET (Qo) and a ground G. The ratio of the resistance value (Ro/Rd) of the second resistor Ro and the first resistor Rd is set to be equal to the ratio of the resistance value (Ron/Rp) of an on-resistance Ron of the FET (Qo) and a wiring pattern Rp. The current detection circuit outputs a voltage VRo between a connection point (node N1) of the first resistor Rd and the second resistor Ro and the circuit ground G as a detection signal of a current flowing through the FET(Qo). <P>COPYRIGHT: (C)2013,JPO&INPIT</p> |
