发明名称 半導体デバイス、画像処理装置
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of synchronizing timing of a plurality of data transmission lines at low-cost. <P>SOLUTION: A semiconductor device 100 serially transmits data from a transmission side to a reception side, including synchronization determination code transmission means 301 and 302 for transmitting a code for determining synchronization between data transmissions; clock signal provision means 103 for providing a common clock signal to the transmission side and reception side; a plurality of transmission paths 117 for transmitting the same data in synchronization with the clock signal; clock generation means 110 for delaying the phases of the clock signals provided at the reception side for different specified quantities respectively to generate a plurality of delay clock signals; a plurality of reception buffers 111 for taking in data transmitted via a transmission path in synchronization with the delay clock signal; and selection means 113 and 115 for verifying a code based on a predetermined rule to select one reception buffer from a plurality of reception buffers and one delay clock from a plurality of delay clocks, respectively. <P>COPYRIGHT: (C)2012,JPO&INPIT</p>
申请公布号 JP5720212(B2) 申请公布日期 2015.05.20
申请号 JP20100269985 申请日期 2010.12.03
申请人 发明人
分类号 H04L7/00;H04L7/08;H04L25/02 主分类号 H04L7/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利