发明名称 選択的な基板領域メッキを可能とする方法
摘要 <p>A method of enabling selective area plating on a substrate (201) includes forming a first electrically conductive layer (310) on the substrate, covering the electrically conductive layer with an anti-electroless plating layer (410), patterning the substrate in order to form therein a feature (510, 520) extending through the anti-electroless plating layer and the first electrically conductive layer, forming a second electrically conductive layer (610) adjoining and electrically connected to the first electrically conductive layer, forming a third electrically conductive layer (710) over the second electrically conductive layer, and removing the anti-electroless plating layer and the first electrically conductive layer.</p>
申请公布号 JP5722223(B2) 申请公布日期 2015.05.20
申请号 JP20110531270 申请日期 2009.11.18
申请人 发明人
分类号 H01L21/3205;H01L21/768;H01L23/522;H05K3/10;H05K3/18 主分类号 H01L21/3205
代理机构 代理人
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