发明名称 PHASE LOCKED LOOP WITH PHASE CORRECTION IN THE FEEDBACK LOOP
摘要 <p>A frequency synthesizer circuit is disclosed. The frequency synthesizer circuit includes a comparator circuit coupled to a reference clock and a phase-corrected output signal. The frequency synthesizer circuit also includes a loop filter coupled to the comparator circuit. The frequency synthesizer circuit also includes an oscillator coupled to the loop filter. The frequency synthesizer circuit also includes a fractional divider coupled to an output of the oscillator. The frequency synthesizer circuit also includes phase correction circuitry that corrects a phase of an output of the fractional divider to produce the phase-corrected output signal.</p>
申请公布号 EP2740219(B1) 申请公布日期 2015.05.20
申请号 EP20120751182 申请日期 2012.08.01
申请人 QUALCOMM INCORPORATED 发明人 ZHANG, GANG
分类号 H03L7/081;H03L7/197 主分类号 H03L7/081
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