Connecting interface unit and memory storage device

摘要

A connecting interface unit and a memory storage device without a crystal oscillator are provided and include following circuits. A phase detector detects a phase difference between a first reference signal and an input signal from a host system to generate a phase signal. A signal detecting circuit detects a signal character difference between the input signal and the first reference signal for a signal generating circuit to generate a second reference signal. A phase interpolator generates a clock signal according to the phase signal and the second reference signal. A sampling circuit generates an input data signal according to the clock signal. A transmitter circuit modulates an output data signal according to the clock signal or the second reference signal to generate an output signal, and transmits it to the host system. Accordingly, the connecting interface unit conforms to the specification of a transmission standard.

主权项

1. A connecting interface unit not comprising a crystal oscillator, comprising:
a phase detector configured to receive an input signal from a host system, and to detect a phase difference between the input signal and a first reference signal to generate a first phase signal; a filter coupled to the phase detector and configured to filter the first phase signal to generate a second phase signal; a signal detecting circuit configured to receive the input signal, and to detect a signal character difference between the input signal and the first reference signal to generate a first difference signal; a signal generating circuit coupled to the signal detecting circuit and configured to generate at least one second reference signal according to the first difference signal; a first phase interpolator coupled to the filter and the signal generating circuit and configured to generate a first clock signal according to the second phase signal and the at least one second reference signal; a first sampling circuit coupled to the first phase interpolator and configured to generate an input data signal according to the first clock signal; and a transmitter circuit, not receiving a reference clock from a crystal oscillator, configured to modulate an output data signal according to the first clock signal or one of the at least one second reference signal to generate an output signal, and to transmit the output signal to the host system.