Resistive memory array and method for controlling operations of the same

摘要

A resistive memory and a method for controlling operations of the resistive memory are provided. The resistive memory has a first memory layer, a second memory layer and a medium layer. Each of the first memory layer and the second memory layer is used to store data. The medium layer is formed between the first memory layer and the second memory layer. The method comprises at least a step of measuring a resistance between the first memory layer and the second memory layer, and determining which one of a first state, a second state and a third state is a state of the resistive memory according to the measured resistance. A resistive memory array including an array of the above resistive memory units, word lines and bit lines is also described, wherein the word (bit) lines are coupled to the first (second) memory layers.

主权项

1. A resistive memory array, comprising:
a plurality of resistive memory units arranged in rows and columns, wherein each of the resistive memory units comprises a first memory cell, and a second memory cell disposed under and electrically connected in series with the first memory cell, wherein each of the resistive memory units includes: a first solid electrolyte, being a part of the first memory cell; a second solid electrolyte, being a part of the second memory cell; and an oxidizable electrode, formed between the first solid electrolyte and the second solid electrolyte, wherein the first solid electrolyte and the second solid electrolyte are made of a transition metal oxide or a material containing at least one chalcogenide element; a plurality of word lines, wherein each of the word lines is coupled to the first memory cells of a row of the resistive memory units; and a plurality of bit lines, wherein each of the bit lines is coupled to the second memory cells of a column of the resistive memory units.