发明名称 |
Heterojunction transistors having barrier layer bandgaps greater than channel layer bandgaps and related methods |
摘要 |
A heterojunction transistor may include a channel layer comprising a Group III nitride, a barrier layer comprising a Group III nitride on the channel layer, and an energy barrier comprising a layer of a Group III nitride including indium on the channel layer such that the channel layer is between the barrier layer and the energy barrier. The barrier layer may have a bandgap greater than a bandgap of the channel layer, and a concentration of indium (In) in the energy barrier may be greater than a concentration of indium (In) in the channel layer. Related methods are also discussed. |
申请公布号 |
US9035354(B2) |
申请公布日期 |
2015.05.19 |
申请号 |
US200912566973 |
申请日期 |
2009.09.25 |
申请人 |
Cree, Inc. |
发明人 |
Saxler Adam William;Wu Yifeng;Parikh Primit |
分类号 |
H01L29/778;H01L29/20;H01L29/66;H01L29/207;H01L29/80 |
主分类号 |
H01L29/778 |
代理机构 |
Myers Bigel Sibley & Sajovec, P.A. |
代理人 |
Myers Bigel Sibley & Sajovec, P.A. |
主权项 |
1. A heterojunction transistor comprising:
a channel layer comprising a Group III nitride; a barrier layer comprising a Group III nitride on the channel layer wherein the barrier layer has a bandgap greater than a bandgap of the channel layer; a buffer layer comprising iron doped Group III nitride, wherein the channel layer is between the barrier layer and the buffer layer; a gate contact on the barrier layer so that the barrier layer is between the gate contact and the channel layer; source and drain contacts on opposite sides of the gate contact, wherein the source and drain contacts are spaced apart from the gate contact; and an energy barrier comprising a layer of a Group III nitride between the channel layer and the buffer layer, wherein the channel layer is between the barrier layer and the energy barrier, wherein the energy barrier has a narrower bandgap than the channel layer, wherein the layer of the Group III nitride of the energy barrier comprises a layer of an InN/GaN alloy, wherein a mole fraction of InN (indium nitride) in the InN/GaN alloy of the energy barrier is in the range of about 1% to about 50%, wherein the heterojunction transistor comprising the channel layer, the barrier layer, the gate contact, the source and drain contacts, and the energy barrier is configured to provide a back confinement value of at least about 0.21 ohm mm2 GHz, and wherein the energy barrier is silicon doped; wherein the energy barrier comprises a fully depleted, delta doped electron source layer in proximity with and spaced apart from a fully depleted, delta doped hole source layer by a high field region. |
地址 |
Durham NC US |