Method and system for semiconductor design hierarchy analysis and transformation

摘要

A method and apparatus for partitioning of the input design into repeating patterns called template cores for the application of reticle enhancement methods, design verification for manufacturability and design corrections for optical and process effects is accomplished by hierarchy analysis to extract cell overlap information. Also hierarchy analysis is performed to extract hierarchy statistics. Finally template core candidates are identified. This allows to the design to be made amenable for design corrections or other analyses or modifications that are able to leverage the hierarchy of the design since the cell hierarchy could otherwise be very deep or cells could have significant overlap with each other.

主权项

1. A method operating in a computer system for analyzing an integrated circuit design having a hierarchical structure, the method comprising:
using the computer system to traverse nodes of the hierarchical structure, wherein the nodes represent cells of the integrated circuit design; finding candidate cells to receive corrections for optical proximity distortion, wherein the candidate cells are selected based on at least one of a size of the cells and a frequency of occurrence of the cells; tagging the candidate cells; extracting overlap regions between overlapping cells of the integrated circuit design; and collecting the overlap regions into a different cell, other than the overlapping cells.