发明名称 Semiconductor device and method for manufacturing same
摘要 This semiconductor device (100A) includes: a gate electrode (3) formed on a substrate (2); a gate insulating layer (4) formed on the gate electrode; an oxide layer (50) which is formed on the gate insulating layer and which includes a semiconductor region (51) and a conductor region (55); source and drain electrodes (6s, 6d) electrically connected to the semiconductor region; a protective layer (11) formed on the source and drain electrodes; and a transparent electrode (9) formed on the protective layer. At least part of the transparent electrode overlaps with the conductor region with the protective layer interposed between them. The upper surface of the conductor region contacts with a reducing insulating layer (61) with the property of reducing an oxide semiconductor included in the oxide layer. The reducing insulating layer is out of contact with the channel region of the semiconductor region.
申请公布号 US9035303(B2) 申请公布日期 2015.05.19
申请号 US201314389810 申请日期 2013.04.01
申请人 Sharp Kabushiki Kaisha 发明人 Miyamoto Tadayoshi;Ito Kazuatsu;Miyamoto Mitsunobu;Takamaru Yutaka
分类号 H01L29/12;H01L29/786;H01L29/417;H01L29/66 主分类号 H01L29/12
代理机构 Keating & Bennett, LLP 代理人 Keating & Bennett, LLP
主权项 1. A semiconductor device comprising: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; an oxide layer which is formed on the gate insulating layer and which includes a semiconductor region and a conductor region, wherein the semiconductor region overlaps at least partially with the gate electrode with the gate insulating layer interposed between them; source and drain electrodes electrically connected to the semiconductor region; a protective layer formed on the source and drain electrodes; and a transparent electrode formed on the protective layer, wherein at least part of the transparent electrode overlaps with the conductor region with the protective layer interposed between them, the upper surface of the conductor region contacts with a reducing insulating layer with the property of reducing an oxide semiconductor included in the oxide layer, and the reducing insulating layer is out of contact with a channel region of the semiconductor region.
地址 Osaka JP