Method and apparatus for efficiently transferring data in bursts from a storage device to a host

摘要

A controller and a method for interfacing between a host and storage medium. A storage medium interface includes CH0 circuitry for performing a CH0 process to access a buffer memory on behalf of the storage medium. A host interface includes CH1 circuitry for performing a CH1 process to access the buffer memory on behalf of the host. Access to the buffer memory is arbitrated in sequential tenures to each channel of the multi-channel bus within a maximum arbitration round trip time defined by the time taken by the storage medium to move a distance corresponding to N sectors in which N is greater than one. In the CH0 tenure, the CH0 process transfers data corresponding to N sectors of the storage medium in a multi-sector burst. The length of the tenure of the CH0 channel is pre-designated so that the multi-sector burst is completed within the CH0 tenure.

主权项

1. A method for transferring, via a controller, data from a storage medium of a storage device to a host, wherein the controller includes (i) an interface to the storage medium, (ii) an interface to the host, and (iii) a multi-channel bus, and wherein the storage device further includes a read assembly, the method comprising:
receiving, at the controller from the host, a command to read data from the storage medium; in response to the controller receiving the command to read data from the storage medium, the controller enabling, through the interface to the storage medium, the read assembly to read first data from N number of sectors of the storage medium, wherein the first data corresponds to data to be read from the storage medium as indicated in the command, and wherein N is a positive integer; receiving, by a first queue included in a first channel circuit coupled to a first channel of the multi-channel bus, the first data from the read assembly, wherein multi-channel bus comprises at least (i) the first channel and (ii) a second channel, wherein the first channel circuit is included in the interface to the storage medium, and wherein the storage medium is different and separate from each of (i) the interface to the storage medium and (ii) the interface to the host; arbitrating access to a buffer memory via the multi-channel bus, wherein the buffer memory is coupled to the controller, and wherein access to the buffer memory is arbitrated in a plurality of tenures assigned to a corresponding plurality of channels of the multi-channel bus; during a first tenure of the plurality of tenures, transferring, to the buffer memory, the first data via the first channel from the first queue included in the first channel circuit; subsequent to the first tenure and during a second tenure of the plurality of tenures, transferring, by a second channel circuit coupled to the second channel of the multi-channel bus, the first data from the buffer memory to a second queue via the second channel, wherein the second channel circuit is included in the interface to the host, and wherein the second queue is included in the second channel circuit; and transferring the first data from the second queue to the host.