| 发明名称 | Apparatus and method for determining the number of execution cores to keep active in a processor | ||
| 摘要 | A processor is described that includes a plurality of execution cores. The processor also includes power management circuitry to dynamically determine a number of the execution cores that, when active, will cause the processor to operate in a substantially linear power consumption vs. frequency region of operation such that performance gain as a function of power consumption increase with the number of cores is higher as compared to any other number of active execution cores within an established power envelope. | ||
| 申请公布号 | US9037889(B2) | 申请公布日期 | 2015.05.19 |
| 申请号 | US201213631679 | 申请日期 | 2012.09.28 |
| 申请人 | Intel Corporation | 发明人 | Ananthakrishnan Avinash N.;Sebot Julien Fefe;Schwartz Jay D.;Gunther Stephen H.;Samson Eric C. |
| 分类号 | G06F1/32 | 主分类号 | G06F1/32 |
| 代理机构 | Blakely, Sokoloff, Taylor & Zafman LLP | 代理人 | Blakely, Sokoloff, Taylor & Zafman LLP |
| 主权项 | 1. A processor, comprising: a plurality of execution cores; power management circuitry to dynamically determine a number of said execution cores that, when active, will cause said processor to operate in a substantially linear power consumption vs. frequency region of operation such that performance gain as a function of power consumption increase with said number of cores is higher as compared to any other number of active execution cores within an established power envelope. | ||
| 地址 | Santa Clara CA US | ||