发明名称 Y-decoder and decoding method thereof
摘要 A Y-decoder includes a selection unit and a Y-MUX. The selection unit is coupled to the memory array for selecting the column lines. The Y-MUX is coupled to the selection unit for supplying a voltage to the selected column line. The Y-MUX includes a first switch, a second switch, a third switch and a fourth switch coupled in parallel. The first switch and the second switch are respectively for receiving a first shielding voltage and a second shielding voltage. The third switch and the fourth switch are respectively for receiving a first sensing voltage and a second sensing voltage.
申请公布号 US9036410(B2) 申请公布日期 2015.05.19
申请号 US201113013592 申请日期 2011.01.25
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 Chen Chung-Kuang;Chen Han-Sung;Hung Chun-Hsiung
分类号 G11C11/34;G11C16/06;G11C8/10 主分类号 G11C11/34
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A memory device, comprising: a first column line and a second column line coupled to a memory cell; a third column line, spacing from the second column line with at least one column line; wherein when the memory cell is to be read, a decoder selects and supplies the first column line with a ground voltage, selects and supplies the second column line with a first sensing voltage, allows the at least one column line to float, and selects and supplies the third column line with a first shielding voltage; and a fourth column line and a fifth column line arranged successively next to the second column line, and when the memory cell is to be read, the decoder selects and supplies the fourth column line with a second sensing voltage, and selects and supplies the fifth column line with a second shielding voltage.
地址 Hsinchu TW