发明名称 CMOS image sensor with fast read out
摘要 An image pickup element includes a plurality of read signal lines; a pixel unit in which a plurality of pixel circuits are arranged in a matrix form, the plurality of pixel circuits in the pixel unit being divided into groups of pixel circuits so that each of the groups is provided in a corresponding one of columns, each of the groups of pixel circuits being connected to a corresponding one of the plurality of read signal lines; and a processing unit configured to process read signals that the plurality of pixel circuits, which are divided into groups, output to the plurality of read signal lines, which are connected to the plurality of pixel circuits.
申请公布号 US9036068(B2) 申请公布日期 2015.05.19
申请号 US200912578636 申请日期 2009.10.14
申请人 SONY CORPORATION 发明人 Wada Takamasa;Toyama Takayuki;Mori Tomonori
分类号 H04N3/14;H04N5/335;H04N5/374 主分类号 H04N3/14
代理机构 Sheridan Ross P.C. 代理人 Sheridan Ross P.C.
主权项 1. An image pickup integrated circuit, comprising: a plurality of read signal lines; a pixel unit having a plurality of pixel circuits having all pixels in the plurality of pixel circuits arranged in sequential rows and sequential columns in a matrix, the pixel unit being divided into a first pixel region having a first plurality of pixels from the plurality of pixel circuits and a second pixel region having a second plurality of pixels from the plurality of pixel circuits, the first pixel region comprising a first plurality of first pixel circuits in the sequential rows of the matrix, the second pixel region comprising a second plurality of second pixel circuits in the sequential rows of the matrix, wherein the pixels in the first plurality of pixels are directly adjacent to one another in the column direction with no intervening pixels from the second plurality of pixels, wherein the pixels in the second plurality of pixels are directly adjacent to one another in the column direction with no intervening pixels from the first plurality of pixels, wherein the first pixel region does not overlap with the second pixel region and the first pixel region does not contain pixel circuits from the second set of pixel circuits; a first processing unit configured to process read signals only from the first pixel region; a second processing unit configured to process read signals only from the second pixel region; and a selection drive unit configured to select and drive each of the plurality of pixel circuits wherein all of the pixels in the first plurality of pixels send read signals to only the first processing unit and all of the pixels in the second plurality of pixels send read signals to only the second processing unit such that all pixels in each row of the sequential rows go only to one of the first or the second processing circuits; wherein the image pickup integrated circuit is a CMOS circuit; and wherein the selection drive unit sequentially drives the plurality of pixel circuits in the first pixel region in units of rows in a direction from a last row of the first pixel region to a first row of the first pixel region, and sequentially drives the plurality of pixel circuits in the second pixel region in units of rows in a direction from a last row of the second pixel region to a first row of the second pixel region, the first row of the first pixel region being furthest from the last row of the second pixel region and the last row of the first pixel region being adjacent to the first row of the second pixel region.
地址 JP