| 发明名称 |
Chip package and method for forming the same |
| 摘要 |
An embodiment of the invention provides a chip package which includes: a first substrate; a second substrate disposed on the first substrate, wherein the second substrate has at least one opening penetrating through the second substrate, and the at least one opening defines a plurality of conducting regions electrically insulated from each other in the second substrate; a first insulating layer disposed on a side of the first substrate and filling in the at least one opening of the second substrate; a carrier substrate disposed on the second substrate; a second insulating layer disposed on a surface and a sidewall of the carrier substrate; and a conducting layer disposed on the second insulating layer on the carrier substrate and electrically contacting with one of the conducting regions. |
| 申请公布号 |
US9035456(B2) |
申请公布日期 |
2015.05.19 |
| 申请号 |
US201213467887 |
申请日期 |
2012.05.09 |
| 申请人 |
|
发明人 |
Liu Chien-Hung |
| 分类号 |
H01L23/498;H01L23/00;H01L25/065;H01L21/78;H01L23/31;H01L21/56 |
主分类号 |
H01L23/498 |
| 代理机构 |
Liu & Liu |
代理人 |
Liu & Liu |
| 主权项 |
1. A chip package, comprising:
a first substrate having a first opening; a second substrate disposed on the first substrate, wherein the second substrate has at least one second opening penetrating through the second substrate, and the at least one second opening defines a plurality of conducting regions electrically insulated from each other in the second substrate; a first insulating layer disposed on a side of the first substrate and filling in the first opening and the at least one second opening of the second substrate; a carrier substrate disposed on the second substrate; a second insulating layer disposed on a surface and a sidewall of the carrier substrate; and a conducting layer disposed on the second insulating layer on the carrier substrate and electrically contacting with one of the conducting regions. |
| 地址 |
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