用于静态随机存取记忆体之负偏压热不稳定性应力测试;NEGATIVE BIAS THERMAL INSTABILITY STRESS TESTING FOR STATIC RANDOM ACCESS MEMORY (SRAM)

摘要

在一实施例中，藉由首先将「1」写入一静态随机存取记忆体(SRAM)阵列之每个位元中且接着使用由一镜射位元线电流驱动之一环形振荡器来评估该阵列之相关参数而对该阵列之一部分施予应力，该环形振荡器不在SRAM之位元线上。接着，在将「0」写入该阵列之每个位元中之后对该阵列之另一部分施予应力。接着，重复该评估程序。 In one embodiment, one portion of an SRAM array is stressed by first writing a “1” in every bit of the array, followed by an evaluation of the relevant parameters of the array using a ring oscillator driven by a mirrored bit-line current, the ring oscillator not in line of the bit-line of the SRAM. The other portion of the array is then stressed after writing a “0”