发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING VARIABLE RESISTANCE ELEMENT
摘要 According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array include the memory cells each including a variable resistance element in which a reset current flowing in a reset operation is smaller than a set current flowing in a set operation by not less than one order of magnitude. The control circuit performs the reset operation and the set operation for the memory cells. The control circuit performs the reset operation for all memory cells being in the low resistance state and connected to selected first interconnections and selected second interconnections.
申请公布号 US2015131363(A1) 申请公布日期 2015.05.14
申请号 US201514602851 申请日期 2015.01.22
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TAKASHIMA Akira;MIYAGAWA Hidenori;FUJII Shosuke;MATSUSHITA Daisuke
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项 1. A nonvolatile semiconductor memory device, comprising: a memory cell array comprising memory cells connected between first interconnections and second interconnections and no transistor connected between the first interconnections and the second interconnections, at least one of the memory cells including a variable resistance element; and a control circuit configured to perform a set operation by applying a set voltage to a first selected memory cell, the control circuit being further configured to perform a reset operation and a reset verify operation to a second selected memory cell, the reset operation being performed by applying a reset voltage having a polarity opposite to the set voltage to the second selected memory cell, and the reset verify operation being performed by applying a reset verify voltage having a polarity same as the set voltage to the second selected memory cell.
地址 Minato-ku JP
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