| 发明名称 |
Bump-on-Trace Methods and Structures in Packaging |
| 摘要 |
A method and structure for bump-on-trace bonding is provided. In an embodiment traces to be used for bump-on-trace (BOT) bonding are protected during a pre-solder treatment. The pre-solder treatment improves the adhesion between the exposed traces (e.g., the non-BOT traces) and a solder resist layer. |
| 申请公布号 |
US2015130061(A1) |
申请公布日期 |
2015.05.14 |
| 申请号 |
US201514602985 |
申请日期 |
2015.01.22 |
| 申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Wu Jiun Yi |
| 分类号 |
H01L23/00;H05K1/03;H05K1/11 |
主分类号 |
H01L23/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An electrical device comprising:
a substrate; a first trace on the substrate; and a second trace on the substrate, the second trace having an undercut region greater than the first trace. |
| 地址 |
Hsin-Chu TW |
