Low Cost and Ultra-Thin Chip on Wafer on Substrate (CoWoS) Formation

摘要

Methods of making and an integrated circuit device. An embodiment method includes patterning a first polymer layer disposed over a first copper seed layer, electroplating a through polymer via in the first polymer layer using the first copper seed layer, a via end surface offset from a first polymer layer surface, forming a second polymer layer over the first polymer layer, the second polymer layer patterned to expose the via end surface, and electroplating an interconnect in the second polymer layer to cap the via end surface using a second copper seed layer.

主权项

1. An integrated circuit device comprising:
a first polymer layer having a first side and a second side; an interconnect structure on the first side of the first polymer layer: a conductive via extending from the interconnect structure to the second side of the first polymer layer, wherein an end of the conductive via contacting the interconnect structure is offset from the first side of the first polymer layer; a seed layer over the conductive via on the second side of the first polymer layer; and a first bump over the seed layer.