GALLIUM NITRIDE FIELD EFFECT TRANSISTOR WITH BURIED FIELD PLATE PROTECTED LATERAL CHANNEL

摘要

A method for fabricating a lateral gallium nitride (GaN) field-effect transistor includes forming a first and second GaN layer coupled to a substrate, removing a first portion of the second GaN layer to expose a portion of the first GaN layer, and forming a third GaN layer coupled to the second GaN layer and the exposed portion of the first GaN layer. The method also includes removing a portion of the third GaN layer to expose a portion of the second GaN layer, forming a source structure coupled to the third GaN layer. A first portion of the second GaN layer is disposed between the source structure and the second GaN layer. A drain structure is formed that is coupled to the third GaN layer or alternatively to the substrate. The method also includes forming a gate structure coupled to the third GaN layer such that a second portion of the third GaN layer is disposed between the gate structure and the second GaN layer.

主权项

1. A method for fabricating a lateral-channel/lateral-drift GaN field-effect transistor (FET), the method comprising:
providing a substrate; providing a first GaN layer coupled to the substrate, wherein the first GaN layer has a first conductivity type; forming a second GaN layer coupled to the first GaN layer, wherein the second GaN layer has a second conductivity type; removing a portion of the second GaN layer to expose a portion of the first GaN layer; forming a third GaN layer coupled to the second GaN layer and the exposed portion of the first GaN layer, wherein the third GaN layer has a third conductivity type; removing a portion of the third GaN layer to expose a portion of the second GaN layer; forming a source structure coupled to the third GaN layer, wherein a first portion of the third GaN layer is disposed between the source structure and the second GaN layer; forming a drain structure coupled to the third GaN layer; and forming a gate structure coupled to the third GaN layer, wherein a second portion of the third GaN layer is disposed between the gate structure and the second GaN layer.