CLOCK AND DATA DRIVERS WITH ENHANCED TRANSCONDUCTANCE AND SUPPRESSED OUTPUT COMMON-MODE

摘要

Maintaining a low output common-mode voltagein a driver is desirable. To maintain the low output common-mode voltage, apparatus, method, and means are proposed as follows: a first differential amplifier stage configured to provide a differential output for the apparatus; and a second differential amplifier stage configured to drive the first differential amplifier stage, the second differential amplifier stage including a pre-driver amplifier, a pair of n-stage units, and an input skew averaging unit, the input skew averaging unit configured to suppress the output common-mode voltage by splitting each of the pair of n-stage units into two half blocks and driving the blocks with complementary digital input to cancel out a skew in a gate-to-source voltage of the pair of n-stage units. Furthermore, two feed-forward capacitors are added to enhance the transconductance and operating speed of main transistors of the first differential amplifier stage.