发明名称 |
INTEGRATED ANTENNA FOR RFIC PACKAGE APPLICATIONS |
摘要 |
A chip package includes a set of layers including conductive planes connected by vias. A first portion has at least one antenna, antenna ground plane, and first grounded vias. A second portion has a conductive plane parallel to the ground plane that forms an interface for connecting to at least one integrated circuit device. A third portion between the first and the second portion has a vertical transmission line that includes a signal via connecting the antenna feed line to the at least one integrated circuit and a parallel-plate mode suppression mechanism. The parallel-plate mode suppression mechanism includes a grounded reflector that forms a cage with the grounded vias around an antenna region and further includes second ground vias surrounding the signal via. |
申请公布号 |
US2015129668(A1) |
申请公布日期 |
2015.05.14 |
申请号 |
US201514603856 |
申请日期 |
2015.01.23 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
KAM DONG G.;LlU DUIXIAN;REYNOLDS SCOTT K. |
分类号 |
H01Q1/22;G06K19/077;H01L23/66 |
主分类号 |
H01Q1/22 |
代理机构 |
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代理人 |
|
主权项 |
1. A chip package, comprising:
a plurality of layers including conductive planes connected by vias, the layers including:
a first portion having at least one antenna, antenna ground plane, and first grounded vias formed therein;a second portion having a conductive plane parallel to the ground plane that forms an interface for connecting to at least one integrated circuit device; anda third portion between the first and the second portion comprising:
a vertical transmission line that includes a signal via connecting the antenna feed line to the at least one integrated circuit; anda parallel-plate mode suppression mechanism, the parallel-plate mode suppression mechanism including a grounded reflector that forms a cage with the grounded vias around an antenna region and further including second ground vias surrounding the signal via. |
地址 |
Armonk NY US |