发明名称 集積電圧制御発振器回路
摘要 <p>Techniques for providing voltage-controlled oscillator circuits having improved phase noise performance and lower power consumption. In an exemplary embodiment, a voltage controlled oscillator (VCO) is coupled to a mixer or a frequency divider such as a divide-by-two circuit. The VCO includes a transistor pair with magnetically cross-coupled inductors, and variable capacitance coupled to the gates of the transistor pair. In an exemplary embodiment, a frequency divider is configured to divide the frequency of the differential current flowing through the transistor pair to generate the LO output. In an alternative exemplary embodiment, a mixer is configured to mix the differential current flowing through the transistor pair with another signal. The VCO and mixer or frequency divider share common bias currents, thereby reducing power consumption. Various exemplary apparatuses and methods utilizing these techniques are disclosed.</p>
申请公布号 JP5718255(B2) 申请公布日期 2015.05.13
申请号 JP20110548411 申请日期 2010.02.02
申请人 发明人
分类号 H03B5/12;H03B5/02;H04B1/40 主分类号 H03B5/12
代理机构 代理人
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