发明名称 信号バッファ回路とセンサ制御基板と画像読取装置および画像形成装置
摘要 <p>A signal buffer circuit includes a buffer (11) to conduct a buffering operation for transmitting a signal to a subsequent unit; a resistor (12) connected between an input side and an output side of the buffer; and a variable impedance device (13) connected in series to the output side of the buffer. The variable impedance device is at low impedance when the buffer is conducting the buffering operation and at high impedance when the buffer is not conducting the buffering operation.</p>
申请公布号 JP5716346(B2) 申请公布日期 2015.05.13
申请号 JP20100230829 申请日期 2010.10.13
申请人 发明人
分类号 H04N1/028;G06T1/00 主分类号 H04N1/028
代理机构 代理人
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