发明名称 System and method for performing processing in a testing system
摘要 A system and method is provided for performing processing in a test system. A flexible platform may be provided for developing test programs for performing automated testing. In one such platform, the tester and its instruments are isolated from the tester operating system, permitting any tester operating system to be used. In another example implementation, a user layer of the platform is isolated from the physical layer of the architecture, permitting hardware-independent test programs that can be created and used among different testers having different test hardware and software. In yet another implementation, execution of a test program is isolated from a tester platform operating system, permitting the test program to function independent from the tester platform. In another embodiment, functionality is implemented on the platform such that functions are only added, and that existing links to functions are not broken, ensuring continued test system operation when new software, hardware and/or features are added to the platform. The test system may include a non-deterministic computer system. In one example test system, the system forces execution of one or more computer instructions performed by the non-deterministic computer system to execute within a constant execution time. A deterministic engine, if necessary, waits a variable amount of time to ensure that the execution of the computer instructions is performed over the constant execution time. Because the execution time is constant, the execution is deterministic and therefore may be used in applications requiring deterministic behavior. For example, such a deterministic engine may be used in automated test equipment (ATE) applications.
申请公布号 US9032384(B2) 申请公布日期 2015.05.12
申请号 US200711827083 申请日期 2007.07.10
申请人 Bin1 ATE, LLC 发明人 Blancha Barry E.;Lechowicz Leszek Janusz;Helm Stephen S.;Adam Sean Patrick;Camargo Jorge;Heil Carlos;Mendes Paulo
分类号 G06F9/445;G01R31/3183;G01R31/28 主分类号 G06F9/445
代理机构 Lando & Anastasi LLP 代理人 Lando & Anastasi LLP
主权项 1. A automatic test equipment (ATE) system comprising: at least one processor operatively connected to a memory, the processor when executing is configured to provide: a test program that, when executed by the at least one processor, performs a procedure on test hardware comprising at least one test instrument, the procedure including a request for a test function; an ATE platform including an abstraction layer for decoupling the test program from the test hardware, wherein the abstraction layer includes:a virtual instrument (“VI”) layer without hardware implementation-specific functionality configured to (a) receive at least one request from the test program through at least one virtual instrument virtual instrument (“VI”) interface, wherein said VI interface is implemented as an add-only programming interface using a virtual instrument virtual function table to allow backward-compatible upgrades; (b) map the request from the test program into a function call to a hardware-specific physical instrument layer; (c) communicate the function call to at least one hardware-specific physical instrument layer;a hardware-specific physical instrument (“PI”) layer comprising at least on physical instrument (“PI”) module representing the hardware specific implementation of a test instrument, the physical instrument layer configured to: (a) receive the function call from the virtual instrument layer through a virtual instrument (“VI”) to physical instrument interface (“PI”), wherein said VI to PI interface is implemented as an add-only programming interface using a physical instrument virtual function table to allow backward-compatible upgrades: (b) map the functional call into a hardware specific instruction for at least one test instrument in the test hardware; and (c) communicate the hardware-specific instruction to the test instrument for execution,an interface generation engine configured to generate at least one update to at least one of the VI interface or VI to PI interface, wherein updates are generated only by adding additional functionality to at least one of the virtual instrument virtual function table or the physical instrument virtual function table to ensure backward compatibility.
地址 Boxborough MA US