发明名称 |
Stacked semiconductor package and method for manufacturing the same |
摘要 |
A stacked semiconductor package includes: a first semiconductor chip formed with a first through electrode, the first through electrode protruding above a first surface of the first semiconductor chip; a first polymer layer formed over the first surface of the first semiconductor chip such that the first through electrode is exposed by the first polymer layer; a second semiconductor chip having a first surface attached onto the first semiconductor chip by medium of the first polymer layer and a vial hole passing through the second semiconductor chip, the first surface of the second semiconductor chip being formed with a bonding pad having a through hole which corresponds to the first through electrode; and a second through electrode located within the through hole and the via hole and is electrically connected with the first through electrode. |
申请公布号 |
US9030009(B2) |
申请公布日期 |
2015.05.12 |
申请号 |
US201314051679 |
申请日期 |
2013.10.11 |
申请人 |
SK Hynix Inc. |
发明人 |
Moon Ki Il;Oh Jae Sung |
分类号 |
H01L21/768;H01L23/538;H01L23/00 |
主分类号 |
H01L21/768 |
代理机构 |
William Park & Associates Ltd. |
代理人 |
William Park & Associates Ltd. |
主权项 |
1. A method for manufacturing a stacked semiconductor package, comprising the steps of:
forming a first through electrode in a first semiconductor chip formed at a first surface of a first wafer; etching a second surface of the wafer opposing to the first surface such that the first through electrode is protruded above the second surface of the wafer; forming a first polymer layer that covers the second surface of the wafer and exposes the first through electrode; attaching a first surface of a second semiconductor chip onto the first semiconductor chip by medium of the first polymer layer, the first surface of the second semiconductor chip being formed with a bonding pad having a through hole which corresponds to the first through electrode; forming a second polymer layer over the first polymer layer including the second semiconductor chip; etching the second polymer layer and the second semiconductor chip to form a via hole which is connected with the through hole and by which the bonding pad and the first through electrode are exposed; forming a second through electrode in the via hole and the through hole, the second through electrode being electrically connected with the bonding pad and the first through electrode; and individualizing a stacked semiconductor package by cutting the first and second polymer layers and the wafer. |
地址 |
Gyeonggi-do KR |