发明名称 |
Chipset support for binding and migrating hardware devices among heterogeneous processing units |
摘要 |
A method for providing access to hardware devices by a processor without causing conflicts with other processors included in a computer system. The method includes receiving a first address map from a first processor and a second address map from a second processor, where each address map includes memory-mapped input/output (I/O) apertures for a set of hardware devices that the processor is configured to access. The method further includes generating a global address map by combining the first address map and the second address map, receiving a first access request from the first processor and routing the first access request to a hardware device based on an address mapping included in the global address map. Advantageously, heterogeneous processors included in multi-processor system can access any hardware device included in the computer system, without modifying the processors, one or more operating systems executed by each processor, or the hardware devices. |
申请公布号 |
US9032101(B1) |
申请公布日期 |
2015.05.12 |
申请号 |
US200812332009 |
申请日期 |
2008.12.10 |
申请人 |
NVIDIA Corporation |
发明人 |
Cox Michael Brian;Simeral Brad W. |
分类号 |
G06F3/00;G06F12/10;G06F12/02 |
主分类号 |
G06F3/00 |
代理机构 |
Artegis Law Group, LLP |
代理人 |
Artegis Law Group, LLP |
主权项 |
1. A method for providing access to hardware devices included in a computer system by a processor without causing conflicts with other processors included in the computer system, the method comprising:
receiving a first address map from a first processor that includes memory-mapped input/output (I/O) apertures for a first set of hardware devices including a first aperture associated with a first hardware device that the first processor is configured to access; receiving a second address map from a second processor that includes memory-mapped I/O apertures for a second set of the hardware devices including a second aperture associated with the first hardware device that the second processor is configured to access; generating a global address map by combining the first address map and the second address map, wherein the global address map includes the first aperture and the second aperture; receiving a first access request from the first processor; and routing the first access request to the first hardware device associated with the first access request based on an address mapping included in the global address map. |
地址 |
Santa Clara CA US |